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rev.1.00 aug. 20, 2004 page 1 of 10 HD74LVC4245A octal bus transceiver and 3.3 v to 5 v shifters with 3-state outputs rej03d0378?0100 (previous ade-205-683 (z)) rev.1.00 aug. 20, 2004 description the HD74LVC4245A has eight bus transceivers with three state outputs in a 24 pin package. when (dir) is high, data flows from the a inputs to the b outputs, and when (dir) is low, data flows from the b inputs to the a outputs. a and b bus are separated by making enable input ( oe ) high level. and this product has two terminals (v cca , v ccb ), v cca (5v) is connected with control input and a bus side, v ccb (3.3v) connected with b bus side. v cca and v ccb are isolated. this allows for translation from a 3.3 v to a 5 v environment, and vice versa. low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. features ? this product function as level shift transceiver that change v cca input level to v ccb output level, v ccb input level to v cca output level by providing different supply voltage to v cca and v ccb . ? this product is able to the power management: turn on and off the supply on v ccb side with providing the supply of v cca . (enable input ( oe ): high level ) ? v cca = 4.5 v to 5.5 v, v ccb = 2.7 v to 3.6 v ? all control input v i (max) = 5.5 v (@v cca = 0 v to 5.5 v) ? all a bus side input outputs v i/o (max) = 5.5 v (@v cca = 0 v or output off state) ? all b bus side input outputs v i/o (max) = 3.6 v (@v ccb = 0 v or output off state) ? high output current a bus side : 24 ma (@v cca = 4.5 v to 5.5 v) b bus side : 12 ma (@v ccb = 2.7 v) 24 ma (@v ccb = 3.0 v to 3.6 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) HD74LVC4245Atel tssop?24 pin ttp?24dbv t el (1,000 pcs/reel)
HD74LVC4245A rev.1.00 aug. 20, 2004 page 2 of 10 function table inputs oe dir operation l l b data to a bus l h a data to b bus hxz h: high level l: low level x: immaterial z: high impedance pin arrangement 1 2 3 4 5 6 7 8 9 10 v cca v ccb v ccb dir a1 a8 a7 a6 a5 a4 a3 a2 gnd gnd 11 12 13 14 15 16 17 18 19 20 21 22 23 24 gnd b7 b6 b4 b5 b3 b2 oe b8 b1 (top view)
HD74LVC4245A rev.1.00 aug. 20, 2004 page 3 of 10 absolute maximum ratings (1) for v cca item symbol ratings unit conditions supply voltage v cca ?0.5 to 6.0 v input voltage *1 v i ?0.5 to 6.0 v dir, oe ?0.5 to v cca +0.5 a port output ?h? or ?l? input / output voltage v i/o ?0.5 to 6.0 v a port output ?z? or v cca : off input diode current i ik ?50 ma v i < 0 ?50 v o < 0 output diode current i ok 50 ma v o > v cca +0.5 output current i o 50 ma v cca , gnd current i cca or i gnd 100 ma maximum power dissipation at ta = 25c (in still air) *2 p t 862 mw tssop storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded ev en if the input and output clamp-current ratings are observed. 2. the maximum package power dissipation was calculated using a junction temperature of 150c. (2) for v ccb item symbol ratings unit conditions supply voltage v ccb ?0.5 to 4.6 v ?0.5 to v ccb +0.5 b port output ?h? or ?l? input / output voltage *1 v i/o ?0.5 to 4.6 v b port output ?z? or v ccb : off input diode current i ik ?50 ma v i < 0 ?50 v o < 0 output diode current i ok 50 ma v o > v ccb +0.5 output current i o 50 ma v ccb ,gnd current i ccb or i gnd 100 ma maximum power dissipation at ta = 25c (in still air) *2 p t 862 mw tssop storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded ev en if the input and output clamp-current ratings are observed. 2. the maximum package power dissipation was calculated using a junction temperature of 150c.
HD74LVC4245A rev.1.00 aug. 20, 2004 page 4 of 10 recommended operating conditions (1) for v cca item symbol ratings unit conditions supply voltage v cca 4.5 to 5.5 v v i 0 to 5.5 dir, oe 0 to v cca a port output ?h? or ?l? input / output voltage v i/o 0 to 5.5 v a port output ?z? or v cca : off i oh ?24 output current i ol 24 ma input transition rise or fall time ? t / ? v 10 ns / v operating temperature ta ?40 to 85 c note: unused or floating inputs must be held high or low. (2) for v ccb item symbol ratings unit conditions supply voltage v ccb 2.7 to 3.6 v 0 to v ccb b port output ?h? or ?l? input / output voltage v i/o 0 to 3.6 v b port output ?z? or v ccb : off ?12 v ccb = 2.7 v i oh ?24 v ccb = 3.0 to 3.6 v 12 v ccb = 2.7 v output current i ol 24 ma v ccb = 3.0 to 3.6 v input transition rise or fall time ? t / ? v 10 ns / v operating temperature ta ?40 to 85 c note: unused or floating inputs must be held high or low. block diagram o e b1 dir a1 22 21 2 3 to seven other channels
HD74LVC4245A rev.1.00 aug. 20, 2004 page 5 of 10 electrical characteristics (ta = ?40 to 85c) item symbol v cca (v) v ccb (v) min max unit test conditions v ih 4.5 to 5.5 2.7 to 3.6 2 ? input voltage v il 4.5 to 5.5 2.7 to 3.6 ? 0.8 v 4.5 to 5.5 2.7 to 3.6 v cca ?0.2 ? i oh = ?100 a 4.5 2.7 to 3.6 3.7 ? v oha 5.5 2.7 to 3.6 4.7 ? v i oh = ?24 ma 4.5 to 5.5 2.7 to 3.6 v ccb ?0.2 ? i oh = ?100 a 4.5 to 5.5 2.7 2.2 ? 4.5 to 5.5 3.0 2.4 ? i oh = ?12 ma v ohb 4.5 to 5.5 3.0 2 ? v i oh = ?24 ma 4.5 to 5.5 2.7 to 3.6 ? 0.2 i ol = 100 a 4.5 2.7 to 3.6 ? 0.55 v ola 5.5 2.7 to 3.6 ? 0.55 v i ol = 24 ma 4.5 to 5.5 2.7 to 3.6 ? 0.2 i ol = 100 a 4.5 to 5.5 2.7 ? 0.4 i ol = 12 ma output voltage v olb 4.5 to 5.5 3.0 ? 0.55 v i ol = 24 ma input current i in 5.5 2.7 to 3.6 ? 1 a control input i oza 5.5 2.7 to 3.6 ? 5 a port, v o = v cca or gnd off state output current i ozb 4.5 to 5.5 3.6 ? 5 a b port, v o = v ccb or gnd output leak current i off 00 ? 20 a a port, v i/o = 5.5 v b port, v i/o = 3.6 v i cca 5.5 2.7 to 3.6 ? 80 a b to a, control input =v cca or gnd bn = v ccb or gnd, i o (a port) = 0 quiescent supply current i ccb 4.5 to 5.5 3.6 ? 50 a a to b, control input =v cca or gnd an = v cca or gnd, i o (b port) = 0 ? i cca 5.5 2.7 to 3.6 ? 1.5 ma a port or control input, one input at 3.4 v, other input at v cca at gnd increase in i cc per input *1 ? i ccb 4.5 to 5.5 2.7 to 3.6 ? 0.5 ma b port, one input at v ccb ?0.6v, other input at v ccb at gnd notes: for condition shown as min or max, use the appr opriate values under recommended operating conditions. 1. this is the increase in supply current for each input that is at the specified tt l voltage level rather than v cc or gnd.
HD74LVC4245A rev.1.00 aug. 20, 2004 page 6 of 10 capacitance (ta = 25c) item symbol v cca (v) v ccb (v) min typ max unit test conditions control input capacitance c in 53.3 ? 5 ? pf v i = v cca or gnd input/output capacitance c i/o 53.3 ? 11 ? pf a port, v i = v cca or gnd, b port, v i = v ccb or gnd switching characteristics (ta = ?40 to 85c), v cca = 5.00.5 v, v ccb = 2.7 v to 3.6 v item symbol min typ max unit test conditions from(input) to(output) t plh 1 ? 6.7 t phl 1 ? 6.3 ab t plh 1 ? 5 propagation delay time t phl 1 ? 6.1 ns c l = 50 pf r l = 500 ? ba t zh 1 ? 8.1 t zl 1 ? 9 oe a t zh 1 ? 9.8 output enable time t zl 1 ? 8.8 ns c l = 50 pf r l = 500 ? oe b t hz 1 ? 5.8 t lz 1 ? 7 oe a t hz 1 ? 7.8 output disable time t lz 1 ? 7.7 ns c l = 50 pf r l = 500 ? oe b operating characteristics item symbol v cca (v) v ccb (v) min typ max unit test conditions power dissipation capacitance c pd 5.0 3.0 ? 39.5 ? pf f = 10 mhz, c l = 0 power-up considerations level-translation devices offer an opportunity for successful mixed-voltage signal design. a proper power-up sequence always shoul d be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies caused by improperly biased device pins. take these precautions to guard against such power-up problems. 1. connect ground before any supply voltage is applied. 2. next, power up the control side of the device. (power up of v cca is first. next power up is v ccb .) 3. tie oe to v cca with a pullup resistor so that it ramps with v cca . 4. depending on the direction of the data path, dir can be high or low. if dir high is needed (a data to b bus), ramp it with v cca . overwise, keep dir low.
HD74LVC4245A rev.1.00 aug. 20, 2004 page 7 of 10 test circuit open s1 c l = 50 pf *1 500 ? load circuit for outputs 500 ? see under table gnd symbol t / t plh phl t / t zh hz t / t zl lz s1 open open gnd gnd 6 v note: 1. c l includes probe and jig capacitance. v cca = 50.5 v v ccb = 2.7 to 3.6 v a/ oe to b b/ oe to a 2 v cca
HD74LVC4245A rev.1.00 aug. 20, 2004 page 8 of 10 waveforms ? 1 input 10 % vref1 vref2 vref2 vref2 vref1 vref1 90 % t r 90 % v ih v ih gnd 10 % t f output t plh v t phl oh v ol symbol 3.0 v 2.7 v 1.5 v 1.5 v 1.5 v v cca = 50.5 v v ccb = 2.7 to 3.6 v a to b b to a 1/2 v cca
HD74LVC4245A rev.1.00 aug. 20, 2004 page 9 of 10 waveforms ? 2 waveform - b notes: 1. all input pulses are supplied by generators having the following characteristics : prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. 2. waveform - a is for an output with internal conditions such that the output is low except when disabled by the output control. 3. waveform - b is for an output with internal conditions such that the output is high except when disabled by the output control. 4. the output are measured one at a time with one transition per measurement. waveform - a v oh v ol v + 0.3 v ol v - 0.3 v oh output control 10 % 10 % vref1 vref1 90 % t f 90 % v ih v oh gnd gnd t r vref2 vref2 t hz t lz t zh t zl vref2 vref1 v ih symbol 3.0 v 3.0 v 1.5 v 1.5 v 1.5 v v cca = 50.5 v v ccb = 2.7 to 3.6 v oe to b oe to a 1/2 v cca
HD74LVC4245A rev.1.00 aug. 20, 2004 page 10 of 10 package dimensions package code jedec jeita mass (reference value) ttp?24dbv ? ? 0.08 g *pd plating 0.13 m 0.65 112 24 13 7.80 4.40 8.10 max 0.50 0.10 0? ? 8? *0.15 0.05 6.40 0.20 0.10 1.10 max 0.65 max *0.20 0.05 0.07 +0.03 ?0.04 1.0 as of july, 2001 unit: mm
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